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A couple of definitions
:-
RIPPLE THROUGH. An input
changes level during the
clock period, and the
change appears at the
output.
PROPAGATION DELAY. The
time between applying a
signal to an input, and
the resulting change in
the output.
These can give problems
in logic circuits.
The master/slave
flip-flop overcomes
them.
It consists of two
rising edge triggered D
type flip-flops.
The clock of the slave
is fed via an inverter
so that the falling edge
of the origonal clock
pulse becomes a rising
edge.
The slave clock pulse is
an inverted version of
the clock pulse shown in
the lower diagram.
The flip-flops are
triggered at different
levels of the clock
pulse edge.
When data is to be
entered, the slave is
isolated from the
master, so that changes
at the input do not
appear at the output.
Data on D is passed to Q
of the master.
The master is then
isolated from the D
input.
Data, from the Q of the
master, is passed to Q
of the slave.
t1. Slave isolated
from Master.
t2. Master connected to
D input.
t3. Master isolated
from D input.
t4. Master Q connected
Slave D.
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